MIPS Assembly Language Programming

Series
Prentice Hall
Author
Robert Britton  
Publisher
Pearson
Cover
Softcover
Edition
1
Language
English
Total pages
168
Pub.-date
May 2003
ISBN13
9780131420441
ISBN
0131420445
Related Titles



Description

For freshman/sophomore-level courses in Assembly Language Programming, Introduction to Computer Organization, and Introduction to Computer Architecture.

Students using this text will gain an understanding of how the functional components of modern computers are put together and how a computer works at the machine language level. MIPS architecture embodies the fundamental design principles of all contemporary RISC architectures. By incorporating this text into their courses, instructors will be able to prepare their undergraduate students to go on to upper-division computer organization courses.

Features

  • Free MIPS architecture simulator—Enables easy observation of the memory-mapped I/O, interrupts and exception processing, and delayed loads and delayed branches for a pipelined implementation.
    • Allows students to learn how to write the fundamental assembly language code to implement the classical I/O algorithms; enables students to gain experience writing assembly language interrupt response routines, at the heart of any operating system.

  • Extensive pedagogy—Includes 67 programming exercises.
    • Enables students to practice what they have learned.

  • Well-written and clearly organized.
    • Provides students with the most up-to-date and easily understandable material.

  • Comprehensive Appendix A—Provides a quick source for all fundamental information needed to develop programs.
    • Gives students a handy quick-reference for all fundamental programming information; can serve as a handbook in the future.

Table of Contents



 1. The MIPS Architecture.


 2. Algorithm Development in Pseudocode.


 3. Number Systems.


 4. PCSpim: The MIPS Simulator.


 5. Efficient Algorithm Development.


 6. Function Calls Using the Stack.


 7. Reentrant Functions.


 8. Memory Mapped I/O.


 9. Exceptions and Interrupts.


10. A Pipelined Implementation.


11. Floating-Point Instructions.


Appendix A: Quick Reference.


Appendix B: ASCII Codes.


Appendix C: Integer Instruction Set.


Appendix D: Macro Instructions.


Appendix E: A Modified Trap Handler.


Appendix F: Floating-Point Instruction Set.


Index.

Back Cover

First impressions are important.

To introduce your Assembly Language programming students to the fundamental concepts of contemporary computer architecture, start with a Reduced Instruction Set Computer (RISC).

When students first encounter computer architecture, they need to begin with the basics of modern computer organization. The MIPS architecture embodies the fundamental design principles of all contemporary RISC architectures:

  • All instructions are directly executed in hardware
  • The rate at which instructions are issued is maximized
  • Instructions are easy to decode
  • Only load and store instructions reference memory
  • Plenty of general purpose registers are provided (32 for MIPS)

MIPS Assembly Language Programming offers students an understanding of how the functional components of modern computers are put together and how a computer works at the machine-language level. The book begins with a datapath diagram that shows a simple implementation of the MIPS architecture, consisting of a register file, an ALU, a memory. a program counter, and an instruction register. As students progress through the text, they will elaborate on this established datapath diagram model, allowing them to visualize how the instructions are fetched and executed as they write their programs.

The Spim simulator for the MIPS architecture runs on PC's and Unix® systems. All the programming exercises are done using this simulator, which can be downloaded for free from the Internet. Using the MIPS simulator allows students to observe the contents of the registers and memory change as their programs execute. The students are not isolated by a particular operating system from experiencing and writing code dealing with:

  • Memory-mapped I/0
  • Interrupts and exception processing
  • Delayed loads and delayed branches for a pipelined implementation

It is assumed that students using this text already have some experience in developing algorithms, and running programs in a high-level language. The skills they will learn with MIPS Assembly Language Programming offer a sound basis for advanced work in computer architectures and complex assembly languages.


Instructor Resources